july 1999 f dg 6302 p dual p -channel , digital fet general description features . * the pinouts are symmetrical; pin 1 and 4 are interchangeable. units inside the carrier can be of either orientation and will not affect the functionality of the device. absolute maximum ratings t a = 25c unless otherwise noted symbol parameter f dg 6302 p units v dss drain-source voltage -25 v v gss gate-source voltage -8 v i d drain/output current - continuous -0.14 a - pulsed -0.4 p d maximum power dissipation (note 1 ) 0.3 w t j ,t stg operating and storage temperature range -55 to 150 c esd electrostatic discharge rating mil-std-883d human body model (100 pf / 1500 w ) 6 .0 kv thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1 ) 415 c/w fdg 6302 p rev.f1 -25 v, -0.14 a continuous, -0.4 a peak. r ds(on) = 10 w @ v gs = -4.5 v, r ds(on) = 13 w @ v gs = -2.7 v. very low level gate drive requirements allowing direct operation in 3 v circuits (v gs(th) < 1.5 v). gate-source zener for esd ruggedness (>6 kv human body model). compact industry standard sc70-6 surface mount package. these dual p -c hannel logic level enhancement mode field effect transistors are produced using fairchild 's proprietary, high cell density, dmos technology. this very high density process is especially tailored to minimize on-state resistance. this device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal mosfets. sot-23 supersot t m -8 so-8 sot-223 sc70-6 supersot t m -6 1 or 4 * 6 or 3 5 or 2 4 or 1 * 2 or 5 3 or 6 sc70-6 g1 d2 s1 d1 s2 g2 .02
electrical characteristics ( t a = 25 o c unless otherwise noted ) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 a -25 v d bv dss / d t j breakdown voltage temp. coefficient i d = -250 a , referenced to 25 o c -19 mv / o c i dss zero gate voltage drain current v ds = -20 v, v gs = 0 v -1 a t j = 5 5c -10 a i gss gate - body leakage current v gs = -8 v, v ds = 0 v -100 na on characteristics (note 2) v gs (th) gate threshold voltage v ds = v gs , i d = -250 a -0.65 -0.9 -1.5 v d v gs(th) / d t j gate threshold voltage temp.coefficient i d = -250 a , referenced to 25 o c 2 mv / o c r ds(on) static drain-source on-resistance v gs = -4.5 v, i d = -0.14 a 7.3 10 w t j =12 5c 11 17 v gs = -2.7 v, i d = -0.05 a 10.4 13 i d(on) on-state drain current v gs = -4.5 v, v ds = -5 v -0.14 a g fs forward transconductance v ds = -5 v, i d = -0.14 a 0.12 s dynamic characteristics c iss input capacitance v ds = -10 v, v gs = 0 v, f = 1.0 mhz 12 pf c oss output capacitance 7 pf c rss reverse transfer capacitance 1.5 pf switching ch aracteristics (note 2 ) t d(on ) turn - on delay time v dd = -5 v, i d = -0.25 a, v gs = -4.5 v, r gen = 6 w 5 12 ns t r turn - on rise time 8 16 ns t d(off) turn - off delay time 9 18 ns t f turn - off fall time 5 10 ns q g total gate charge v ds = -5 v, i d = -0.14 a, v gs = -4.5 v 0.22 0.31 nc q gs gate-source charge 0.12 nc q gd gate-drain charge 0.05 nc drain-source diode characteristics and maximum ratings i s maximum continuous source current -0.25 a v sd drain-source diode forward voltage v gs = 0 v, i s = -0.25 a (note 2 ) -0.8 -1.2 v notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. r q ja = 415 o c/w on minimum pad mounting on fr-4 board in still air. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. fdg 6302 p rev.f1
fdg 6302 p rev.f typical electrical characteristics figure 1. on-region characteristics . figure 2. on-resistance variation with drain current and gate voltage . figure 3. on-resistance variation with temperature . figure 5 . transfer characteristics. figure 4 . on-resistance variation with gate-to -source voltage. -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance j r , normalized ds(on) v = -4.5v gs i = -0.14a d 0 1 2 3 4 0 0.05 0.1 0.15 0.2 -v , drain-source voltage (v) -i , drain-source current (a) v = -4.5v gs ds d -2.7v -3.0v -3.5v -2.0v -2.5v 0 0.05 0.1 0.15 0.2 0.5 1 1.5 2 2.5 -i , drain current (a) drain-source on-resistance v = -2.0v gs d r , normalized ds(on) -4.5v -4.0v -3.0v -2.7v -3.5v -2.5v 1.5 2 2.5 3 3.5 4 4.5 5 0 5 10 15 20 25 -v , gate to source voltage (v) gs r , on-resistance (ohm) ds(on) i = -0.07a d t = 125c a t = 25c a 0 1 2 3 4 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 -v , gate to source voltage (v) -i , drain current (a) v = -5.0v ds gs d t = -55c a 125c 25c 0.2 0.4 0.6 0.8 1 1.2 0.0001 0.001 0.01 0.1 0.3 -v , body diode forward voltage (v) -i , reverse drain current (a) t = 125c a 25c -55c v = 0v gs sd s figure 6 . body diode forward voltage varia tion with source current and temperature.
fdg 6302 p rev.f figure 10 . single pulse maximum power dissipation. figure 8. capacitance characteristics . figure 7 . gate charge characteristics. figure 9. maximum safe operating area. typical electrical characteristics 0 0.1 0.2 0.3 0.4 0.5 0 2 4 6 8 q , gate charge (nc) -v , gate-source voltage (v) g gs v = -5v ds -10 -15 i = -0.14a d 1 2 3 5 10 20 40 0.005 0.03 0.1 0.3 1 - v , drain-source voltage (v) -i , drain current (a) rds(on) limit d dc ds 1s 100ms 10ms v = -4.5v single pulse r = 415c/w t = 25c q ja gs a 10s 0.1 0.2 0.5 1 2 5 10 20 0.5 1 3 5 10 20 40 -v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0 v gs c oss c rss 0.0001 0.001 0.01 0.1 1 10 200 0 10 20 30 40 50 single pulse time (sec) power (w) single pulse r =415c/w t = 25c q ja a 0.0001 0.001 0.01 0.1 1 10 100 200 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance r(t), normalized effective 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t / t 1 2 t - t = p * r (t) a j p(pk) t 1 t 2 q ja r (t) = r(t) * r r =415 c/w q ja q ja q ja figure 11 . transient thermal response curve . thermal characterization performed using the conditions described in note 1 . transient thermal response will change depending on the circuit board design.
sc70-6 unit orientation sc70-6 packaging configuration: figure 1.0 components leader tape 500mm minimum or 125 empty pockets trailer tape 300mm minimum or 75 empty pockets sc70-6 tape leader and trailer configuration: figure 2.0 cover tape carrier tape note/comments packaging option sc70-6 packaging information standard (no flow code) d87z packaging type reel size tnr 7" dia tnr 13" qty per reel/tube/bag 3,000 10,000 box dimension (mm) 184x187x47 343x343x64 max qty per box 9,000 30,000 weight per unit (gm) 0.0055 0.0055 weight per reel (kg) 0.1140 0.3960 f63tnr label customized label antistatic cover tape 184mm x 187mm x 47mm pizza box for standard option f63tnr label f63tnr barcode label f63tnr label sample 343mm x 342mm x 64mm intermediate box for d87z option 21 21 21 21 f63tnr label 21 pin 1 lot: cbvk741b019 fsid: FDG6302p d/c1: d9842 qty1: spec rev: spec: qty: 3000 d/c2: qty2: cpn: n/f: f (f63tnr)3 packaging description: sc70-6 parts are shipped in tape. the carrier tape is made from a dissipative (carbon filled) polycarbonate resin. the cover tape is a multilayer film (heat activated adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. these reeled parts in standard option are shipped with 3,000 units per 7" or 177cm diameter reel. the reels are dark blue in color and is made of polystyrene plastic (anti- static coated). other option comes in 10,000 units per 13" or 330cm diameter reel. this and some other options are described in the packaging information table. these full reels are individually barcode labeled and placed inside a pizza box (illustrated in figure 1.0) made of recyclable corrugated brown paper with a fairchild logo printing. one pizza box contains three reels maximum. and these pizza boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. static dissipative embossed carrier tape sc70-6 tape and reel data and package dimensions august 1999, rev. c
sc70-6 tape and reel data and package dimensions, continued july 1999, rev. c p1 a0 d1 p0 f w e1 d0 e2 b0 tc wc k0 t dimensions are in inches and millimeters tape size reel option dim a dim b dim c dim d dim n dim w1 dim w2 dim w3 (lsl-usl) 8mm 7" dia 7.00 177.8 0.059 1.5 0.512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 2.165 55 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 e 0.429 7.9 e 10.9 8mm 13" dia 13.00 330 0.059 1.5 0.512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 4.00 100 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 e 0.429 7.9 e 10.9 see detail aa dim a max 13" diameter option 7" diameter option dim a max see detail aa w3 w2 max measured at hub w1 measured at hub dim n dim d min dim c b min detail aa notes: a0, b0, and k0 dimensions are determined with respect to the eia/jedec rs-481 rotational and lateral movement requirements (see sketches a, b, and c). 20 deg maximum component rotation 0.5mm maximum 0.5mm maximum sketch c (top view) component lateral movement typical component cavity center line 20 deg maximum typical component center line b0 a0 sketch b (top view) component rotation sketch a (side or front sectional view) component rotation user direction of feed sc70-6 embossed carrier tape configuration: figure 3.0 sc70-6 reel configuration: figure 4.0 dimensions are in millimeter pkg type a0 b0 w d0 d1 e1 e2 f p1 p0 k0 t wc tc sc70-6 (8mm) 2.24 +/-0.10 2.34 +/-0.10 8.0 +/-0.3 1.55 +/-0.05 1.125 +/-0.125 1.75 +/-0.10 6.25 min 3.50 +/-0.05 4.0 +/-0.1 4.0 +/-0.1 1.20 +/-0.10 0.255 +/-0.150 5.2 +/-0.3 0.06 +/-0.02
sc70-6 (fs pkg code 76) sc70-6 tape and reel data and package dimensions, continued september 1998, rev. a1 1:1 scale 1:1 on letter size paper dimensions shown below are in: inches [millimeters] part weight per unit (gram): 0.0055
trademarks acex? bottomless? coolfet? crossvolt? e 2 cmos tm fact? fact quiet series? fast fastr? gto? the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. supersot?-8 syncfet? tinylogic? uhc? vcx? hisec? isoplanar? microwire? pop? powertrench qfet? qs? quiet series? supersot?-3 supersot?-6 ? rev. e ?
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